1. Field
The disclosure relates to transceiver architectures for communications systems.
2. Background
Wireless transceivers incorporate circuitry for performing both transmit (TX) and receive (RX) functions for a communications apparatus. The TX portion of a transceiver may include a baseband TX signal generator and up-conversion mixers for mixing the baseband TX signal with a TX local oscillator (LO), which shifts the TX signal up to the TX carrier frequency. The RX portion of the transceiver may include down-conversion mixers for mixing an RX signal with an RX LO, which shifts the spectrum of the RX signal down in frequency for further processing.
As the TX and RX carrier frequencies may generally be different based on the communications system design, zero-intermediate frequency (zero-IF) transceiver architectures typically employ separate TX and RX LO's (i.e., at different frequencies) to perform the up-conversion and down-conversion, respectively. However, the need to provide separate TX and RX LO's undesirably increases the power and die area consumption of the transceiver, e.g., due to the need to provide multiple phase-locked loops (PLL's) to generate the separate TX and RX LO's. On the other hand, providing a single LO for both TX and RX portions of a transceiver (e.g., according to a non-ZIF architecture) poses several challenges, as the resultant intermediate frequency (IF) of the RX signal would be variable, depending on the particular communication system design.
It would be desirable to provide techniques to accommodate such a variable or “sliding” IF to advantageously reduce power consumption and complexity in transceiver designs.